Earth Simulator
From TOP500 Supercomputing Sites - Wiki
[edit] Description
The Earth Simulator was developed for Japan Aerospace Exploration Agency, Japan Atomic Energy Research Institute, and Japan Marine Science and Technology Center. The system is Located at the Earth Simulator Center (ESC) in Kanazawa-ku (ward), Yokohama-shi, Japan.
It is able to run holistic simulations of global climate in both the atmosphere and the oceans down to a resolution of 10 km. Its performance on the HPL benchmark is 35.86 TFLOPS.
Built by NEC, the Earth Simulator is based on their SX-6 architecture. It consists of 640 nodes with eight vector processors and 16 gigabytes of computer memory at each node, for a total of 5120 processors and 10 terabytes of memory.
Construction started in October 1999, was completed by February 2002, and the site officially opened on March 11, 2002. The project cost 7.2 billion yen.
Earth Simulator's capacity was surpassed by IBM's Blue Gene/L prototype on September 29, 2004.
The ESC has several special features that help to protect the computer from natural disasters or occurrences. A wire nest hangs over the building which helps to protect from lightning. The nest itself uses high-voltage shielded cables to release lightning current into the ground. A special light propagation system utilizes halogen lamps, installed outside of the shielded machine room walls, to prevent any magnetic interference from reaching the computers. The building is constructed on a seismic isolation system, composed of rubber supports, that protect the building during earthquakes.
[edit] Information Tables
| Vendor | NEC |
|---|---|
| System designer | NEC |
| Model name(s) | Earth Simulator (SX-6) |
| Time of manufacture | by 2002.02 |
| Number of systems sold | 1 |
| Resellers | - |
| GENERAL INFORMATION | |
|---|---|
| Class | MPP |
| Type | Distributed-memory multi-vector processor |
| Operating system | Super-UX (Unix variant based on BSD V.4.3 Unix) |
| Compilers | Fortran 90, HPF, ANSI C, C++ |
| Other specific software | - |
| Affiliated technologies | - |
| CPU generation used | NEC SX |
| CPU model | 500MHz / 8GFLOPS NEC SX-6 |
| DRAM type | FPLRAM, 32GB/s per CPU |
| FPGA | n/a |
| System cooling | Air |
| Floor space | 50m x 65m for system, 1m x 1.4m x 2m cabinets |
| NETWORK | |
| Node Interconnect | Remote access control unit (RCU), 12.3GB/s inter-node speed/ 130 links per RCU |
|
Network switch / Size / Quantity | 128 Data Switches (in 64 cabinets) / 640 ports and 12.3GB/s bidirectional interconnect per switch |
| Network topology | A full crossbar, configurable hardware 3D sub-arrays and indirect access |
| Management network | 2 Control Switches / 640 links per switch |
| BUILDING BLOCKS | |||
|---|---|---|---|
| Block name --> | Node | Cabinet | System |
| Structure | basic block | 2 nodes | 320 cabinets + 65 switch cabinets |
| Number of CPU | 8 | 16 | 5120 |
| Memory size (max) | 16GB | 32GB | 10TB |
| Other equipment | 1 I/O processor | - | 700TB disk space 1.6PB tape storage |
| Power consumption | ~20kW | - | ~7000 (18000) kW |
| Theor.performance | 64GFLOPS | 128GFLOPS | 40.96TFLOPS |
| BENCHMARKS | |||
|
HPL Benchmark: CPUs / Rmax / efficiency / Date | - | - | 5120x 500MHz / 35860GF / 87.5% / 2002 |
| Application performance | - | - | - |
